Patent · US Active

Stack-type semiconductor device

US9859321B2 · kind B2 · utility

1Cited by
4References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 25, 2016
Grant dateJan 2, 2018
Priority date
Expiry dateOct 25, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10F39/8063

Abstract

A stack-type semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower interconnection on the lower substrate, a lower pad on the lower interconnection, and a lower interlayer insulating layer covering side surfaces of the lower interconnection and the lower pad. The upper device includes an upper substrate, an upper interconnection under the upper substrate, an upper pad under the upper interconnection, and an upper interlayer insulating layer covering side surfaces of the upper interconnection and the upper pad. Each of the pads has a thick portion and a thin portion. The thin portions of the pads are bonded to each other, the thick portion of the lower pad contacts the bottom of the upper interlayer insulating layer, and the thick portion of the upper pad contacts the top of the lower interlayer insulating layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.