Edge termination for semiconductor devices and corresponding fabrication method
US9859360B2 · kind B2 · utility
2Cited by
3References
17Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 16, 2016 |
| Grant date | Jan 2, 2018 |
| Priority date | — |
| Expiry date | Jun 16, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/112
Abstract
A termination region of an IGBT is described, in which surface p-rings are combined with oxide/polysilicon-filled trenches, buried p-rings and surface field plates, so as to obtain an improved distribution of potential field lines in the termination region. The combination of surface ring termination and deep ring termination offers a significant reduction in the amount silicon area which is required for the termination region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.