Chip structure
US9862600B2 · kind B2 · utility
0Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 21, 2015 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | May 21, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
One example discloses an chip, comprising: a substrate; a first side of a passivation layer coupled to the substrate; a device, having a device height and a cavity, wherein a first device surface is coupled to a second side of the passivation layer which is opposite to the first side of the passivation layer; and a set of structures coupled to the second side of the passivation layer and configured to have a structure height greater than or equal to the device height.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.