Hardware acceleration device handoff for using programmable integrated circuits as hardware accelerators

US9864828B1 · kind B1 · utility

Assignee

• XILINX, INC. · US

Inventors

• Susheel Puthana · Longmont, US
• Stephen P. Rozum · Loveland, US
• Sudipto Chakraborty · Plano, US
• David A. Knol · San Jose, US
• Yong Li · Beijing, CN
• Fernando J. Martinez Vallina · Sunnyvale, US
• Sonal Santan · San Jose, US
• Nabeel Shirazi · Millbrae, US
• Salil Ravindra Raje · Saratoga, US
• Ethan Parker · Draper, US
• Suman Kumar Timmireddy · Hyderabad, IN
• Heera Nand · Hyderabad, IN

Key dates

• Filing date: Sep 17, 2015
• Grant date: Jan 9, 2018
• Expiry date: Feb 12, 2036

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F30/394
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Implementing hardware accelerators using programmable integrated circuits may include performing, using a processor, a design flow on a static circuit design. The static circuit design may specify a region reserved for a hardware accelerator and a static region comprising interface circuitry configured to couple the hardware accelerator with an external node. The design flow may generate an implemented static circuit design. Metadata describing the interface circuitry may be generated using a processor. A device support archive including the implemented static circuit design and the metadata may be written, using the processor, to a computer readable storage medium.