Electronic device and method for fabricating the same
US9865319B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2015 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | Sep 18, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/841
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: an under layer including first and second metal layers and a barrier layer having a dual phase structure of different crystal structures and interposed between the first and second metal layers; a first magnetic layer positioned over the under layer and having a variable magnetization direction; a tunnel barrier layer positioned over the first magnetic layer; and a second magnetic layer positioned over the tunnel barrier layer and having a pinned magnetization direction, and the under layer may further include a barrier layer having a dual phase structure between the first and second metal layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.