Write data path to reduce charge leakage of negative boost
US9865337B1 · kind B1 · utility
13Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2017 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | Mar 22, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A write driver is provided that includes a first write driver inverter that inverts a data signal to drive a gate of a second write driver transistor. The write driver transistor has a terminal coupled to a bit line and another terminal coupled to a boost capacitor. A ground for the first write driver inverter floats during a write assist period to choke off leakage of boost charge from the boost capacitor through the write driver transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.