Method of manufacturing a semiconductor device with trench gate by using a screen oxide layer
US9865726B2 · kind B2 · utility
1Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2016 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | Oct 13, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A screen oxide layer is formed on a main surface of a semiconductor layer and a passivation layer is formed on the screen oxide layer. A gate trench is formed in a portion of the semiconductor layer exposed by a mask opening in a trench mask that comprises the passivation layer. A gate dielectric is formed at least along sidewalls of the gate trench. After removing the passivation layer, dopants are implanted through the screen oxide layer to form at least one of a source zone and a body zone in the semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.