Error characterization and mitigation for 16nm MLC NAND flash memory under total ionizing dose effect
US9870834B2 · kind B2 · utility
11Cited by
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16Claims
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Key dates
| Filing date | Oct 19, 2016 |
| Grant date | Jan 16, 2018 |
| Priority date | — |
| Expiry date | Oct 19, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data device includes a memory having a plurality of memory cells configured to store data values in accordance with a predetermined rank modulation scheme that is optional and a memory controller that receives a current error count from an error decoder of the data device for one or more data operations of the flash memory device and selects an operating mode for data scrubbing in accordance with the received error count and a program cycles count.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.