Semiconductor device with metal silicide blocking region and method of manufacturing the same
US9871035B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2013 |
| Grant date | Jan 16, 2018 |
| Priority date | — |
| Expiry date | Mar 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a gate stack on a semiconductor substrate. In some embodiments, the semiconductor device further includes a semiconductor element, such as for example, a resistor, on the semiconductor substrate. The semiconductor device includes a metal silicide layer on at least one of the gate stack, the source region, and the drain region. The semiconductor device also includes a blocking region in a portion of the semiconductor element. In some embodiments, the blocking region includes first dopants and second dopants with an atomic radius smaller than that of the first dopants.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.