Memory structure and a method for forming the same
US9871047B1 · kind B1 · utility
1Cited by
7References
16Claims
0Family size
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Key dates
| Filing date | Jan 20, 2017 |
| Grant date | Jan 16, 2018 |
| Priority date | — |
| Expiry date | Jan 20, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a SRAM cell having transistors defined by fins and metal gate stack structures. A transistor and a corresponding pick up cell are disposed in an extension direction of the fins. The transistor and the corresponding pick up cell have metal gate stack structures of the same type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.