Boost charge recycle for low-power memory
US9875790B1 · kind B1 · utility
8Cited by
10References
17Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 31, 2017 |
| Grant date | Jan 23, 2018 |
| Priority date | — |
| Expiry date | Mar 31, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/229
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A negative bit line boost circuit for a memory is configured to control a write multiplexer and a write assist transistor so that charge from a boost capacitor positively charges a bit line following a write assist period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.