Doherty-Chireix combined amplifier
US9882535B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2016 |
| Grant date | Jan 30, 2018 |
| Priority date | — |
| Expiry date | Jun 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier that is configured to amplify an RF signal includes a power combiner circuit. The power combiner circuit includes a first branch connected between a first RF input port and a summing node and a second branch connected between a second RF input port and the summing node. Each of the first and second branches includes an impedance inverter. The Chireix combiner is configured to present a Chireix load modulated impedance response to the first and second RF input ports. The power combiner circuit further includes compensation elements being configured to at least partially compensate for a reactance of the Chireix combiner circuit in a Doherty amplifier mode in which a signal is applied to the first RF input port and the second RF input port is electrically open.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.