Patent · US Active

Semiconductor module arrangement and method for producing a semiconductor module arrangement

US9888601B2 · kind B2 · utility

0Cited by

16References

13Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Patrick Jones · Kirkwood, US
Christoph Koch · Salzkotten, DE
Michael Sielaff · Erwitte, DE

Key dates

Filing date	Jan 22, 2014
Grant date	Feb 6, 2018
Priority date	—
Expiry date	Mar 27, 2035

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY10T29/49208
WIPO fieldAudio-visual technology
WIPO sectorElectrical engineering

Abstract

A semiconductor module arrangement is provided having a first subassembly, a second subassembly and a third subassembly. The third subassembly has a quantity of adjustment pins which are fixedly connected to one another. The first subassembly has a number N1 of first adjustment openings, and the second subassembly has a number N2 of second adjustment openings. Each of the adjustment pins engages into a different one of the first adjustment openings and/or into one of the second adjustment openings. A corresponding method of producing the semiconductor module arrangement is also provided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.