System and method to increase lockstep core availability
US9891917B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2013 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | Oct 14, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for increasing lockstep core availability provides for writing a state of a main CPU core to a state buffer, executing one or more instructions of a task by the main CPU core to generate a first output for each executed instruction, and executing the one or more instructions of the task by a checker CPU core to generate a second output for each executed instruction. The method further includes comparing the first output with the second output, and if the first output does not match the second output, generating one or more control signals, and based upon the generation of the one or more control signals, loading the state of the main CPU core from the state buffer to the main CPU core and the checker CPU core.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.