Methods for providing macro placement of IC
US9892226B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2016 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | May 5, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for providing a macro placement of an integrated circuit is provided. An initial placement of the integrated circuit is obtained, wherein the initial placement includes a plurality of first macro blocks. The first macro blocks are divided into a plurality of groups according to the hierarchy of the integrated circuit. A value of layout area is obtained for each of the groups according to macro areas of the first macro blocks. A plurality of candidate placements are obtained for each of the groups according to the value of placement area corresponding to the group, wherein the candidate placement includes the first macro blocks corresponding to the group. A first macro placement is obtained according to a specific placement o selecting from the candidate placements for each of the groups.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.