Fan-out panel level package and method of fabricating the same
US9892980B2 · kind B2 · utility
0Cited by
4References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2017 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | Feb 21, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15747
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a package includes providing a mold substrate supporting dies in cavities of a fan-out substrate, detecting positions of the dies with respect to the fan-out substrate, and forming interconnection lines. At least one of the interconnection lines includes a first portion extending from the fan-out substrate to a target position on the cavity disposed between the fan-out substrate and one of the dies the one of the dies disposed at a detected position different from the target position, and a second portion extending from the one die to the fan-out substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.