Manufacturing method of selectively etched DMOS body pickup
US9893170B1 · kind B1 · utility
1Cited by
5References
15Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 18, 2016 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | Nov 18, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a LDMOS device in a well region of a semiconductor substrate, including: forming a body region and a source layer in the well region through a window of a polysilicon layer above the well region, wherein the body region has a deeper junction depth than the source layer; forming spacers at side walls of the polysilicon layer; and etching through the source layer through a window shaped by the spacers, wherein the source layer under the spacers is protected from etching, and is defined as source regions of the LDMOS device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.