Context save and restore
US9898298B2 · kind B2 · utility
1Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2013 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | May 29, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Processor context save latency is reduced by only restoring context registers with saved state that differs from the reset value of registers. A system agent monitors access to the design blocks and sets a dirty bit to indicate which design block has registers that have changed since the last context save. During a context save operation, the system agent bypasses design blocks that have not had context changes since the latest context save operation. During a context restore operation the system agent does not restore the context registers with saved context values that are equal to the reset value of the context register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.