Zeev Offen
27Patents
6h-index
32Co-inventors
69Inventor score
Filing activity: Feb 14, 2000 → Oct 26, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9367114B2 | Controlling operating voltage of a processor | Emerging Cross-Sectional Technologies | 16 | Active |
| US9250901B2 | Execution context swap between heterogeneous functional hardware units | Emerging Cross-Sectional Technologies | 15 | Active |
| US10394300B2 | Controlling operating voltage of a processor | Emerging Cross-Sectional Technologies | 9 | Active |
| US9996135B2 | Controlling operating voltage of a processor | Emerging Cross-Sectional Technologies | 9 | Active |
| US6570573B1 | Method and apparatus for pre-fetching vertex buffers in a computer system | Physics | 9 | Expired |
| US9081687B2 | Method and apparatus for MONITOR and MWAIT in a distributed cache architecture | Physics | 7 | Active |
| US11175712B2 | Controlling operating voltage of a processor | Physics | 3 | Active |
| US11507167B2 | Controlling operating voltage of a processor | Emerging Cross-Sectional Technologies | 2 | Active |
| US8643660B2 | Technique to share information among different cache coherency domains | Physics | 2 | Active |
| US9395784B2 | Independently controlling frequency of plurality of power domains in a processor system | Emerging Cross-Sectional Technologies | 2 | Active |
| US9898298B2 | Context save and restore | Emerging Cross-Sectional Technologies | 1 | Active |
| US8347035B2 | Posting weakly ordered transactions | Physics | 1 | Active |
| US7290179B2 | System and method for soft error handling | Physics | 1 | Expired |
| US11822409B2 | Controlling operating frequency of a processor | Emerging Cross-Sectional Technologies | 1 | Active |
| US9239789B2 | Method and apparatus for monitor and MWAIT in a distributed cache architecture | Physics | 1 | Active |
| US9946650B2 | Technique to share information among different cache coherency domains | Physics | 0 | Active |
| US10078590B2 | Technique to share information among different cache coherency domains | Physics | 0 | Active |
| US9035959B2 | Technique to share information among different cache coherency domains | Physics | 0 | Active |
| US8151061B2 | Ensuring coherence between graphics and display domains | Emerging Cross-Sectional Technologies | 0 | Active |
| US9594413B2 | Interface for communication between circuit blocks of an integrated circuit, and associated apparatuses, systems, and methods | Emerging Cross-Sectional Technologies | 0 | Active |
| US10401928B2 | Interface for communication between circuit blocks of an integrated circuit, and associated apparatuses, systems, and methods | Emerging Cross-Sectional Technologies | 0 | Active |
| US10204051B2 | Technique to share information among different cache coherency domains | Physics | 0 | Active |
| US12339723B2 | Controlling operating voltage of a processor | Emerging Cross-Sectional Technologies | 0 | Active |
| US9035960B2 | Technique to share information among different cache coherency domains | Physics | 0 | Active |
| US9665488B2 | Technique to share information among different cache coherency domains | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.