Raised e-fuse
US9899319B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2017 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Feb 9, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device with a semiconductor-on-insulator (SOI) structure is provided including an insulating layer and a semiconductor layer formed on the insulating layer and a fuse. The fuse includes a first at least partially silicided raised semiconductor region with a first silicided portion and, adjacent to the first at least partially silicided raised semiconductor region, a second at least partially silicided raised semiconductor region with a second silicided portion. The second silicided portion is formed in direct physical contact with the first silicided portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.