Patent · US Active

Method for forming a power semiconductor device and a power semiconductor device

US9899470B2 · kind B2 · utility

0Cited by

7References

20Claims

0Family size

Assignee

Infineon Technologies Austria AG · AT

Inventors

Marko Lemke · Dresden, DE
Knut Stahrenberg · Wappingers Falls, US
Ralf Rudolf · Dresden, DE
Rolf Weis · Dresden, DE

Key dates

Filing date	May 17, 2017
Grant date	Feb 20, 2018
Priority date	—
Expiry date	May 17, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/82
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method of forming a power semiconductor device includes providing a semiconductor layer of a first conductivity type extending to a first side and having a first doping concentration of first dopants providing majority charge carriers of a first electric charge type in the layer, and forming a deep trench isolation including forming a trench which extends from the first side into the semiconductor layer and includes, in a vertical cross-section perpendicular to the first side, a wall, forming a compensation semiconductor region of the first conductivity type at the wall and having a second doping concentration of the first dopants higher than the first doping concentration, and filling the trench with a dielectric material. The amount of first dopants in the compensation semiconductor region is such that a field-effect of fixed charges of the first electric charge type which are trapped in the trench is at least partly compensated.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.