Super junction semiconductor device for RF applications, linear region operation and related manufacturing process
US9899508B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2016 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Oct 10, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
Embodiments are directed to super-junction semiconductor devices having an inactive region positioned between active cells. In one embodiment, a semiconductor device is provided that includes a substrate and a drain region on the substrate. The drain region has a first conductivity type. A plurality of first columns is disposed on the drain region, with the first columns having the first conductivity type. A plurality of second columns is disposed on the drain region, with the second columns having a second conductivity type. The first and second columns are alternately arranged such that each of the second columns is positioned between respective first columns. First and second gate structures are included that overlie respective first columns, and a body region is included that has the second conductivity type. The body region abuts at least two second columns and at least one first column positioned between the at least two second columns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.