Efficient support for variable width data channels in an interconnect network
US9900260B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2015 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Dec 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L43/16
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A bridging circuit and method of operation thereof, which couples first and second electronic circuits of a data processing system. The first electronic circuit generates signals corresponding to digits of a flow control unit (flit) of a first flow control protocol and where the second electronic circuit is responsive to signals corresponding to flits of a second flow control protocol. When first flits are destined for the same target buffer, they are combined to provide a second flit consistent with the second flow control protocol and transmitting the second flit to the second electronic circuit. The second flit includes data and metadata fields copied from the first flits, a common field common to each of the first flits, a merged field containing a merger of fields from the first flits and a validity field indicating which portions of the second flit contain valid data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.