Leakage current detection in 3D memory
US9905307B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2016 |
| Grant date | Feb 27, 2018 |
| Priority date | — |
| Expiry date | Sep 12, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technology is described herein for detecting a leakage current between a block select line and a conductive region that exists in multiple blocks of memory cells in a plane. The conductive region may be shared by at least one memory cell in multiple blocks. One example of the conductive region is a common source line that includes one or more local source lines and one or more global source lines. If the leakage current were to become high enough, the electrical short between the conductive region and the block select line could cause a plane level failure. If the leakage current is less than an amount that would cause a plane failure, but that indicates that the non-volatile memory device is susceptible to a plane failure, data may be moved out of the plane before the plane failure occurs. Thus, data loss may be prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.