Efficient sense amplifier shifting for memory redundancy
US9905316B2 · kind B2 · utility
0Cited by
6References
17Claims
0Family size
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Key dates
| Filing date | Aug 1, 2016 |
| Grant date | Feb 27, 2018 |
| Priority date | — |
| Expiry date | Aug 1, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/846
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory includes a plurality of columns and a redundant column. The memory includes a plurality of multiplexers corresponding to the plurality of columns. Depending upon the location of a defect, the multiplexers are configured to select for their corresponding column or an immediately-subsequent column to their corresponding column.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.