Split-gate lateral extended drain MOS transistor structure and process
US9905428B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2015 |
| Grant date | Feb 27, 2018 |
| Priority date | — |
| Expiry date | Nov 2, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a split-gate lateral extended drain MOS transistor, which includes a first gate and a second gate laterally adjacent to the first gate. The first gate is laterally separated from the second gate by a gap of 10 nanometers to 250 nanometers. The first gate extends at least partially over the body, and the second gate extends at least partially over a drain drift region. The drain drift region abuts the body at a top surface of the substrate. A boundary between the drain drift region and the body at the top surface of the substrate is located under at least one of the first gate, the second gate and the gap between the first gate and the second gate. The second gate may be coupled to a gate bias voltage node or a gate signal node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.