Method of simultaneous lithography and etch correction flow
US9910348B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2015 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | Jan 26, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0274
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of mask correction where two independent process models are analyzed and co-optimized simultaneously. In the method, a first lithographic process model simulation is run on a computer system that results in generating a first mask size in a first process window. Simultaneously, a second hard mask open etch process model simulation is run resulting in generating a second mask size in a second process window. Each first lithographic process model and second hard mask open etch process model simulations are analyzed in a single iterative loop and a common process window (PW) optimized between lithography and etch is obtained such that said first mask size and second mask size are centered between said common PW. Further, an etch model form is generated that accounts for differences in an etched pattern due to variation in three-dimensional photoresist profile, the model form including both optical and density terms that directly relate to an optical image.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.