Write bitline driver for a dual voltage domain
US9911472B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2016 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | Nov 28, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are directed to managing signals in a dual voltage domain comprising a high voltage domain and a low voltage domain. A write bitline driver circuit receives complementary global write bitline signals as input signals from a global write bitline driver in the low voltage domain, and a write enable signal as an input signal in the high voltage domain. The write bitline driver circuit generates complementary local write bitline signals as output signals in the high voltage domain for activating bitlines of a memory bank in the high voltage domain. The complementary local write bitline signals are based on the complementary global write bitline signals, voltage level shifted from the low voltage domain to the high voltage domain and gated by the write enable signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.