Mandrel spacer patterning in multi-pitch integrated circuit manufacturing
US9911606B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2016 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | Sep 16, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F71/139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing an integrated circuit (IC) includes receiving a design layout of the IC, wherein the design layout includes two abutting blocks, the two blocks include target patterns, and the target patterns have different pitches in the two blocks. The method further includes generating mandrel pattern candidates in spaces between adjacent target patterns, and assigning first and second colors to the mandrel pattern candidates according to their priorities. The method further includes removing the mandrel pattern candidates assigned with the second color, and outputting a mandrel pattern in computer-readable format for mask fabrication. The mandrel pattern includes the mandrel pattern candidates that are colored with the first color.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.