Flow control for direct memory access transfers
US9916129B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2014 |
| Grant date | Mar 13, 2018 |
| Priority date | — |
| Expiry date | Aug 15, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2205/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Circuits and methods are disclosed that allow devices to control the flow of DMA transfers to or from the devices using a token based protocol. In one example implementation, a DMA circuit includes a transfer control circuit that performs data transfers over a first data channel of a device, when transactions on the first data channel are enabled. The DMA circuit includes a flow control circuit that increments a token count for a data channel of a device when a token for the data channel is received and decrements the token count for each data transfer on the data channel performed by the DMA circuit. The flow control circuit enables data transfers on the data channel when the token count is greater than 0, and otherwise, disables data transfers on the data channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.