Integrated circuits with aluminum via structures and methods for fabricating the same
US9917027B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2015 |
| Grant date | Mar 13, 2018 |
| Priority date | — |
| Expiry date | Mar 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76804
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating an integrated circuit includes forming a first opening in an upper dielectric layer, the first opening having a first width, forming a second opening in a lower dielectric layer, the lower dielectric layer being below the upper dielectric layer, the second opening having a second width that is narrower than the first width, the second opening being substantially centered underneath the first opening so as to form a stepped via structure, conformally depositing an aluminum material layer in the stepped via structure and over the upper dielectric layer, and forming a passivation layer over the aluminum material layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.