Multi-core shared page miss handler
US9921968B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2016 |
| Grant date | Mar 20, 2018 |
| Priority date | — |
| Expiry date | Dec 31, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/684
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are disclosed for using a shared page miss handler device to satisfy page miss requests of a plurality of devices in a multi-core system. One embodiment of such a method comprises receiving one or more page miss requests from one or more respective requesting devices of the plurality of devices in the multi-core system, and arbitrating to identify a first page miss requests of the one or more requesting devices A page table walk is performed to generate a physical address responsive to the first page miss request. Then the physical address is sent to the corresponding requesting device, or a fault is signaled to an operating system for the corresponding requesting device responsive to the first page miss request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.