Inventor · Duvall, WA, US

Christopher D. Bryant

25Patents
6h-index
21Co-inventors
69Inventor score

Filing activity: Sep 3, 1993 → May 30, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US6535946B1 Low-latency circuit for synchronizing data transfers between clock domains derived from a common clock Electricity 80 Expired
US8713263B2 Out-of-order load/store queue structure Physics 53 Active
US8769539B2 Scheduling scheme for load/store operations Physics 38 Active
US6799280B1 System and method for synchronizing data transfer from one domain to another by selecting output data from either a first or second storage device Electricity 31 Expired
US5627975A Interbus buffer for use between a pseudo little endian bus and a true little endian bus Physics 21 Expired
US5392434A Arbitration protocol system granting use of a shared resource to one of a plurality of resource users Physics 18 Expired
US10067762B2 Apparatuses, methods, and systems for memory disambiguation Physics 4 Active
US9892056B2 Multi-core shared page miss handler Physics 2 Active
US8341316B2 Method and apparatus for controlling a translation lookaside buffer Physics 2 Active
US11822486B2 Pipelined out of order page miss handler Emerging Cross-Sectional Technologies 0 Active
US9892059B2 Multi-core shared page miss handler Physics 0 Active
US12007938B2 Processors, methods, systems, and instructions to atomically store to memory data wider than a natively supported data width Physics 0 Active
US9684605B2 Translation lookaside buffer for guest physical addresses in a virtual machine Physics 0 Active
US8594681B2 Intelligent routing of communications to an international number in a messaging service Electricity 0 Active
US10255196B2 Method and apparatus for sub-page write protection Physics 0 Active
US8447309B2 Intelligent routing of communications to an international number in a messaging service Electricity 0 Active
US9875187B2 Interruption of a page miss handler Physics 0 Active
US10219198B2 System and method for short message delivery in a mobility network Electricity 0 Active
US10901940B2 Processors, methods, systems, and instructions to atomically store to memory data wider than a natively supported data width Physics 0 Active
US9921968B2 Multi-core shared page miss handler Physics 0 Active
US11347680B2 Processors, methods, systems, and instructions to atomically store to memory data wider than a natively supported data width Physics 0 Active
US11658969B2 Apparatuses and methods for facilitating port discernment driven mutual authentication and service access authorization Electricity 0 Active
US9921967B2 Multi-core shared page miss handler Physics 0 Active
US10470099B2 System and method for short message delivery in a mobility network Electricity 0 Active
US8645588B2 Pipelined serial ring bus Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.