Patent · US Active

Manufacturing method of semiconductor structure

US9922832B1 · kind B1 · utility

2Cited by
4References
17Claims
0Family size

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Key dates

Filing dateJun 21, 2017
Grant dateMar 20, 2018
Priority date
Expiry dateJun 21, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B41/50

Abstract

A manufacturing method of a semiconductor structure is provided. The manufacturing method of the semiconductor structure includes the following steps: providing a semiconductor substrate, wherein the semiconductor substrate has a first region and a second region surrounding the first region; forming a gate stack and a dummy gate stack in the first region, wherein the dummy gate stack surrounds the gate stack; forming an oxide layer on an exterior wall and a top surface of the dummy gate stack; forming a dummy conductive layer on the gate stack, the dummy gate stack and the oxide layer, wherein the dummy conductive layer has a concave bowl-shaped top surface in the first region; and performing a chemical mechanical polishing (CMP) process on the dummy conductive layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.