System and method for testing a logic-based processing device
US9928150B2 · kind B2 · utility
4Cited by
2References
28Claims
0Family size
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Key dates
| Filing date | Jun 30, 2014 |
| Grant date | Mar 27, 2018 |
| Priority date | — |
| Expiry date | Oct 3, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/263
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operating a test device for a logic-based processing device includes the steps of providing an original set of test instructions, generating one or more Quick Error Detection (QED) test programs, and causing the one or more QED test programs to be executed on the logic-based processing device. Each one of the QED test programs includes the original test program with additional instructions inserted at strategic locations within the original set, wherein the additional instructions and the strategic locations vary between each of the QED test programs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.