Method and system for improving swap performance
US9928169B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2014 |
| Grant date | Mar 27, 2018 |
| Priority date | — |
| Expiry date | May 7, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for improving swap performance are provided. In one embodiment, a computing device is provided with a volatile memory and a non-volatile memory, wherein the non-volatile memory has a first swap area with multi-level cell (MLC) memory and a second swap area with single-level cell (SLC) memory. One of the characteristics of SLC memory is that data is written more quickly in the SLC memory than the MLC memory. A determination is made whether the computing device is operating in normal mode or burst mode. If it is determined that the computing device is operating in normal mode, data is moved from the volatile memory to the first swap area during a swap operation. If it is determined that the computing device is operating in burst mode, data is moved from the volatile memory to the second swap area during a swap operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.