Temperature-compliant integrated circuits
US9928335B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2015 |
| Grant date | Mar 27, 2018 |
| Priority date | — |
| Expiry date | May 27, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects of the present disclosure include a computer-implemented method for designing a temperature-compliant integrated circuit (IC). The method can include: calculating a thermal resistance of an IC layout, the IC layout having an area-dependent thermal conductance, a fin thermal conductance, and a gate thermal conductance each based on a device geometry of a plurality of transistors in the IC layout; calculating a self-heating temperature as directly proportional to the thermal resistance; comparing the self-heating temperature with a threshold temperature; in response to the self-heating temperature exceeding the threshold temperature, automatically modifying the device geometry of the IC layout to reduce at least one of the area term and the perimeter term, thereby reducing the self-heating temperature of the IC layout; and designing the temperature-compliant IC layout by repeating the calculating and automatically modifying steps until the self-heating temperature does not exceed the threshold temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.