Patent · US Active

Bitline precharge control and tracking scheme providing increased memory cycle speed for pseudo-dual-port memories

US9928889B1 · kind B1 · utility

9Cited by

5References

30Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Mukund Narasimhan · Bengaluru, IN
Rakesh Sinha · Cupertino, US
Sharad Gupta · New Delhi, IN
Veerabhadra Rao Boda · Samarlakota, IN

Key dates

Filing date	Mar 21, 2017
Grant date	Mar 27, 2018
Priority date	—
Expiry date	Mar 21, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/419
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A write precharge period for a pseudo-dual-port memory is initiated by an edge (rising or falling) of a read precharge signal. The same edge type (rising or falling) of a write precharge signal signals the end of the write precharge period.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.