Semiconductor memory device and method of manufacturing the same
US9929171B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 19, 2016 |
| Grant date | Mar 27, 2018 |
| Priority date | — |
| Expiry date | Aug 19, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device according to an embodiment comprises: a semiconductor substrate; a semiconductor layer provided extending in a first direction above the semiconductor substrate, on the semiconductor substrate; a first insulating layer provided on a side surface of the semiconductor layer; a charge accumulation layer provided on a side surface of the first insulating layer; a block insulating layer provided on a side surface of the charge accumulation layer; and a plurality of conductive layers stacked in the first direction via an insulating layer, in a periphery of the block insulating layer. The block insulating layer includes: a first block insulating layer; and a second block insulating layer that has a permittivity which is higher than that of the first block insulating layer. A lower end of the second block insulating layer is positioned more upwardly than a lower end of the first insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.