Semiconductor device and manufacturing method thereof
US9929242B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2015 |
| Grant date | Mar 27, 2018 |
| Priority date | — |
| Expiry date | Jun 24, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0177
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A Fin FET semiconductor device includes a fin structure extending in a first direction and extending from an isolation insulating layer. The Fin FET device also includes a gate stack including a gate electrode layer, a gate dielectric layer, side wall insulating layers disposed at both sides of the gate electrode layer, and interlayer dielectric layers disposed at both sides of the side wall insulating layers. The gate stack is disposed over the isolation insulating layer, covers a portion of the fin structure, and extends in a second direction perpendicular to the first direction. A recess is formed in an upper surface of the isolation insulating layer not covered by the side wall insulating layers and the interlayer dielectric layers. At least part of the gate electrode layer and the gate dielectric layer fill the recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.