Method and apparatus to use hardware alias detection and management in a virtually indexed physically tagged cache
US9934152B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 2016 |
| Grant date | Apr 3, 2018 |
| Priority date | — |
| Expiry date | Mar 13, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and techniques relating to hardware alias detection and management in caches are described. A cache controller can receive a cache request that specifies a virtual address, which includes a virtual page number (VPN) and a page offset; access, concurrently, one or more primary tags in a slot of the cache corresponding to a primary cache index that is based on a portion of the page offset and a portion of the VPN and one or more secondary tags in one or more slots corresponding to one or more secondary cache indices that are based on the portion of the page offset and one or more variations of the portion of the VPN; and determine whether there are any primary or secondary matching ways. The controller can write store data to a primary matching way if it exists and perform an alias management operation if any secondary matching ways exist.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.