Transistor and display device comprising oxide semiconductor layer

US9935202B2 · kind B2 · utility

Assignee

• Semiconductor Energy Laboratory Co., Ltd. · JP

Inventors

• Shunpei Yamazaki · Setagaya, JP
• Masayuki Sakakura · Yokohama, JP
• Ryosuke Watanabe · Ebina, JP
• Junichiro Sakata · Atsugi, JP
• Kengo Akimoto · Yokohama, JP
• Akiharu Miyanaga · Yokohama, JP
• Takuya Hirohashi · Atsugi, JP
• Hideyuki Kishida · Atsugi, JP

Key dates

• Filing date: Jun 20, 2012
• Grant date: Apr 3, 2018
• Expiry date: May 31, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/60

Abstract

To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.