Patent · US Active

Semiconductor element and methods for manufacturing the same

US9938141B2 · kind B2 · utility

0Cited by
15References
26Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 23, 2016
Grant dateApr 10, 2018
Priority date
Expiry dateFeb 23, 2036

Classification

  • Technology area (CPC B)Performing Operations; Transporting
  • CPC primaryB81B2207/07
  • WIPO fieldMicro-structural and nano-technology
  • WIPO sectorChemistry

Abstract

A semiconductor element and method are provided such that the method includes providing a processed substrate arrangement including a processed semiconductor substrate and a metallization layer structure on a main surface of the processed semiconductor substrate. The method further includes release etching for generating a kerf in the metallization layer structure at a separation region in the processed semiconductor substrate, the separation region defining a border between a die region of the processed substrate arrangement and at least a second region of the processed substrate arrangement.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.