Implementing hardware accelerator for storage write cache management for writes to storage write cache
US9940250B2 · kind B2 · utility
1Cited by
19References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2015 |
| Grant date | Apr 10, 2018 |
| Priority date | — |
| Expiry date | Nov 12, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and controller for implementing storage adapter enhanced write cache management, and a design structure on which the subject controller circuit resides are provided. The controller includes a hardware write cache engine implementing hardware acceleration for storage write cache management. The hardware write cache engine performs writes to storage write cache with no firmware involvement for greatly enhancing performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.