Inventor · Oronoco, MN, US

Rick A. Weckwerth

34Patents
7h-index
23Co-inventors
65Inventor score

Filing activity: Apr 29, 2004 → Jun 17, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US8544029B2 Implementing storage adapter performance optimization with chained hardware operations minimizing hardware/firmware interactions Physics 311 Active
US7139907B2 Method and apparatus for implementing distributed SCSI devices using enhanced adapter reservations Physics 42 Expired
US8886881B2 Implementing storage adapter performance optimization with parity update footprint mirroring Physics 16 Active
US8868828B2 Implementing storage adapter performance optimization with cache data/directory mirroring Physics 15 Active
US9239797B2 Implementing enhanced data caching and takeover of non-owned storage devices in dual storage device controller configuration with data in write cache Physics 13 Active
US8495258B2 Implementing storage adapter performance optimization with hardware accelerators offloading firmware for buffer allocation and automatically DMA Physics 7 Active
US8495259B2 Implementing storage adapter performance optimization with hardware chains to select performance path Physics 7 Active
US8495469B2 Implementing enhanced IO data conversion with protection information model including parity format of data integrity fields Physics 5 Active
US8516164B2 Implementing storage adapter performance optimization with enhanced hardware and software interface Physics 4 Active
US8656213B2 Implementing storage adapter performance optimization with chained hardware operations and error recovery firmware path Physics 4 Active
US9864695B2 Implementing hardware accelerator for storage write cache management for managing cache destage rates and thresholds for storage write cache Physics 2 Active
US9940249B2 Implementing hardware accelerator for storage write cache management with cache line manipulation Physics 1 Active
US8793462B2 Implementing storage adapter performance optimization with enhanced resource pool allocation Physics 1 Active
US9940252B2 Implementing hardware accelerator for storage write cache management for reads with partial read hits from storage write cache Physics 1 Active
US11922228B2 Host request pacing to balance resources and throughput Physics 1 Active
US9940258B2 Implementing hardware accelerator for storage write cache management for merging data with existing data on fast writes to storage write cache Physics 1 Active
US9940251B2 Implementing hardware accelerator for storage write cache management for reads from storage write cache Physics 1 Active
US9940255B2 Implementing hardware accelerator for storage write cache management for identification of data age in storage write cache Physics 1 Active
US9940254B2 Implementing hardware accelerator for storage write cache management for simultaneous read and destage operations from storage write cache Physics 1 Active
US9940256B2 Implementing hardware accelerator for storage write cache management for managing cache line updates for writes, reads, and destages in storage write cache Physics 1 Active
US9940257B2 Implementing hardware accelerator for storage write cache management for managing cache line updates for purges from storage write cache Physics 1 Active
US9940250B2 Implementing hardware accelerator for storage write cache management for writes to storage write cache Physics 1 Active
US9940253B2 Implementing hardware accelerator for storage write cache management for destage operations from storage write cache Physics 1 Active
US10467150B2 Dynamic tier remapping of data stored in a hybrid storage system Physics 0 Active
US9658968B1 Implementing hardware accelerator for storage write cache management Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.