Porogen bonded gap filling material in semiconductor manufacturing
US9941157B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2015 |
| Grant date | Apr 10, 2018 |
| Priority date | — |
| Expiry date | Jun 26, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1047
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for semiconductor manufacturing includes receiving a device that includes a substrate and a first layer disposed over the substrate, wherein the first layer includes a trench. The method further includes applying a first material over the first layer and filling in the trench, wherein the first material contains a matrix and a porogen that is chemically bonded with the matrix. The method further includes curing the first material to form a porous material layer. The porous material layer has a first portion and a second portion. The first portion is disposed in the trench. The second portion is disposed over the first layer. The first and second portions contain substantially the same percentage of each of Si, O, and C. The first and second portions contain substantially the same level of porosity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.