Testing of power on reset (POR) and unmaskable voltage monitors
US9941875B2 · kind B2 · utility
4Cited by
2References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2017 |
| Grant date | Apr 10, 2018 |
| Priority date | — |
| Expiry date | Jun 6, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/22
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power management circuit includes both a power on reset (POR) circuit and a voltage monitoring circuit. Explicit testing of these circuits is accomplished by controlling voltages applied to the circuits and monitoring an output signal responsive to a logical combination of outputs from the POR circuit and voltage monitoring circuit. The applied voltages are controlled with respect to timing of application, fixing of voltages and varying of voltages in a manner where a certain one of the circuits for explicit test is isolated with change in logic state of the output signal being indicative of operation of that isolated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.