Integrated circuit package, and methods and tools for fabricating the same
US9947560B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2016 |
| Grant date | Apr 17, 2018 |
| Priority date | — |
| Expiry date | Nov 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/35121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) package, assembly tool and method for assembling an IC package are described herein. In a first example, an IC package is provided that includes a package substrate, at least a first integrated circuit (IC) die and a cover. The first integrated circuit (IC) die is mechanically and electrically coupled to the package substrate via solder connections. The cover is bonded to the package substrate. The cover encloses the first IC die and is laterally offset from a peripheral edge of the package substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.