Semiconductor structure and method for manufacturing the same
US9947610B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2016 |
| Grant date | Apr 17, 2018 |
| Priority date | — |
| Expiry date | Jan 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5329
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a semiconductor substrate, a dielectric layer, a buffer layer, at least one recess, and at least one conductor. The dielectric layer is present on the semiconductor substrate. The buffer layer is present between the semiconductor substrate and the dielectric layer. The recess extends into the semiconductor substrate through the dielectric layer and the buffer layer, in which the buffer layer has a removing rate with respect to an etching process for forming the recess. The removing rate of the buffer layer is between those of the semiconductor substrate and the dielectric layer. The conductor is present in the recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.