Semiconductor structure and manufacturing method thereof
US9947753B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2015 |
| Grant date | Apr 17, 2018 |
| Priority date | — |
| Expiry date | Sep 1, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a semiconductor substrate, at least one dielectric layer, a dielectric spacer liner (DSL) layer, and at least one conductor. The dielectric layer is present on the semiconductor substrate. The dielectric layer has at least one contact hole exposing at least a portion of the semiconductor substrate. The semiconductor substrate has at least one recess communicating with the contact hole. The recess has a bottom surface and at least one sidewall. The DSL layer is present on at least the sidewall of the recess. The conductor is present at least partially in the contact hole and is electrically connected to the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.